fix things

git-svn-id: http://svn2.nishi.boats/svn/milsko/trunk@549 b9cfdab3-6d41-4d17-bbe4-086880011989

src/math/math.c

@@ -39,20 +39,20 @@ switch(ty) {
 }
 
 #if defined(__WATCOMC__) || defined(__i386__) || defined(__amd64__)
-static cpuFeatures getCPUFeatures(void) {
+static MwU32 getCPUFeatures(void) {
 	MwU32	    _eax = 1;
-	cpuFeatures _edx;
+	MwU32 _edx;
 
 #ifdef __WATCOMC__
 	__asm {
 		cpuid
 		mov _eax, eax
-//		mov _edx, edx
+		mov _edx, edx
 	}
 #else
-	__asm__ __volatile__(
+	asm volatile (
 	    "cpuid" : "=a"(_eax), "=d"(_edx)
-	    : "a"(1));
+	    : "a"(1) : "ebx", "ecx");
 #endif
 
 	return _edx;
@@ -71,7 +71,7 @@ static MwLLMathVTable* getMultiTable(int ty) {
 
 static MwLLMathVTable* multiTableSetupAndGet(int ty) {
 #if defined(__WATCOMC__) || defined(__i386__) || defined(__amd64__)
-	cpuFeatures features;
+	MwU32 features;
 #endif
 
 	mwLLMultiTable = default_multi_table();
@@ -79,11 +79,11 @@ static MwLLMathVTable* multiTableSetupAndGet(int ty) {
 #if defined(__WATCOMC__) || defined(__i386__) || defined(__amd64__)
 	features = getCPUFeatures();
 	printf("Avaliable x86_64 Features:\n");
-	printf("\tMMX: %s\n", features.mmx ? "true" : "false");
-	printf("\tSSE: %s\n", features.sse ? "true" : "false");
-	printf("\tSSE2: %s\n", features.sse2 ? "true" : "false");
+	printf("\tMMX: %s\n", features & FEATX86_MMX ? "true" : "false");
+	printf("\tSSE: %s\n", features & FEATX86_SSE ? "true" : "false");
+	printf("\tSSE2: %s\n", features & FEATX86_SSE2 ? "true" : "false");
 
-	if(features.mmx) {
+	if(features & FEATX86_MMX) {
 		mmx_apply(mwLLMultiTable);
 	}
 #endif

src/math/math_internal.h

@@ -7,42 +7,10 @@
 #include <Mw/LowLevelMath.h>
 
 /* Bitfield of cpu features we get from x86's CPUID */
-#if defined(__WATCOMC__) || defined(__i386__) || defined(__amd64__)
-typedef struct _cpuFeatures cpuFeatures;
-struct _cpuFeatures {
-	MwBool fpu : 1;	 /* x87 FPU on chip */
-	MwBool vme : 1;	 /* Virtual-8086 Mode Enhancement */
-	MwBool de : 1;	 /* Debugging Extensions */
-	MwBool pse : 1;	 /* Page Size Extensions */
-	MwBool tsc : 1;	 /* Time Stamp Counter */
-	MwBool msr : 1;	 /* RDMSR and WRMSR Support */
-	MwBool pae : 1;	 /* Physical Address Extensions */
-	MwBool mce : 1;	 /* Machine Check Exception */
-	MwBool cx8 : 1;	 /* CMPXCHG8B instr */
-	MwBool apic : 1; /* APIC on Chip */
-	MwBool pad1 : 1;
-	MwBool sep : 1;	    /* SYSENTER and SYSEXIT instrs */
-	MwBool mtrr : 1;    /* Memory Type Range Registers */
-	MwBool pge : 1;	    /* Page Global Bit */
-	MwBool mca : 1;	    /* Machine Check Architecture */
-	MwBool cmov : 1;    /* Conditional Move Instrs */
-	MwBool pat : 1;	    /* Page Attribute Table */
-	MwBool pse36 : 1;   /* 36-Bit Page Size Extension */
-	MwBool psn : 1;	    /* Processor Serial Number */
-	MwBool clflush : 1; /* CLFLUSH instr */
-	MwBool pad2 : 1;
-	MwBool ds : 1;	 /* Debug Store */
-	MwBool acpi : 1; /* Thermal Monitor and Software Controlled Clock Facilities */
-	MwBool mmx : 1;	 /* Intel MMX Technology */
-	MwBool fxsr : 1; /* XSAVE and FXRSTOR Instrs */
-	MwBool sse : 1;	 /* SSE */
-	MwBool sse2 : 1; /* SSE2 */
-	MwBool ss : 1;	 /* Self Snoop */
-	MwBool hit : 1;	 /* Max APIC IDs */
-	MwBool tm : 1;	 /* Thermal Monitor */
-	MwBool pad3 : 1;
-	MwBool pbe : 1; /* Pending Break Enable */
-};
+#if defined(MwLLMathMMX)
+#define FEATX86_MMX (1 << 23)
+#define FEATX86_SSE (1 << 25)
+#define FEATX86_SSE2 (1 << 26)
 #endif
 #include "nbsd_math.h"
 

src/math/mmx.c

@@ -1,7 +1,7 @@
 /* $Id$ */
-#ifdef GUARD
 #include <Mw/LowLevelMath.h>
 
+#ifdef MwLLMathMMX
 #include "math_internal.h"
 #include <mmintrin.h>
 
@@ -12,16 +12,16 @@
 
 static void mmx_add_u8(MwLLVec* a, MwLLVec* b, MwLLVec* out) {
 	DO_MMX_INTRINSIC(_m_paddusb, u8, u8, _MwLLVecDataU8x8);
-};
+}
 static void mmx_sub_u8(MwLLVec* a, MwLLVec* b, MwLLVec* out) {
 	DO_MMX_INTRINSIC(_m_psubusb, u8, u8, _MwLLVecDataU8x8);
-};
+}
 static void mmx_equal_u8(MwLLVec* a, MwLLVec* b, MwLLVec* out) {
 	DO_MMX_INTRINSIC(_m_pcmpeqb, u8, u8, _MwLLVecDataU8x8);
-};
+}
 static void mmx_greaterThen_u8(MwLLVec* a, MwLLVec* b, MwLLVec* out) {
 	DO_MMX_INTRINSIC(_m_pcmpgtb, u8, u8, _MwLLVecDataU8x8);
-};
+}
 
 static void mmx_add_u16(MwLLVec* a, MwLLVec* b, MwLLVec* out) {
 	DO_MMX_INTRINSIC(_m_paddusw, u16, u16, _MwLLVecDataU16x4);
@@ -31,7 +31,7 @@ static void mmx_sub_u16(MwLLVec* a, MwLLVec* b, MwLLVec* out) {
 }
 static void mmx_shiftRight_u16(MwLLVec* a, MwLLVec* b, MwLLVec* out) {
 	DO_MMX_INTRINSIC(_m_psrlw, u16, u16, _MwLLVecDataU16x4);
-};
+}
 static void mmx_shiftLeft_u16(MwLLVec* a, MwLLVec* b, MwLLVec* out) {
 	DO_MMX_INTRINSIC(_m_psllw, u16, u16, _MwLLVecDataU16x4);
 }
@@ -50,7 +50,7 @@ static void mmx_sub_u32(MwLLVec* a, MwLLVec* b, MwLLVec* out) {
 }
 static void mmx_shiftRight_u32(MwLLVec* a, MwLLVec* b, MwLLVec* out) {
 	DO_MMX_INTRINSIC(_m_psrld, u32, u32, _MwLLVecDataU32x2);
-};
+}
 static void mmx_shiftLeft_u32(MwLLVec* a, MwLLVec* b, MwLLVec* out) {
 	DO_MMX_INTRINSIC(_m_pslld, u32, u32, _MwLLVecDataU32x2);
 }
@@ -66,7 +66,7 @@ static void mmx_add_i8(MwLLVec* a, MwLLVec* b, MwLLVec* out) {
 };
 static void mmx_sub_i8(MwLLVec* a, MwLLVec* b, MwLLVec* out) {
 	DO_MMX_INTRINSIC(_m_psubsb, i8, i8, _MwLLVecDataI8x8);
-};
+}
 
 static void mmx_add_i16(MwLLVec* a, MwLLVec* b, MwLLVec* out) {
 	DO_MMX_INTRINSIC(_m_paddsw, i16, i16, _MwLLVecDataI16x4);

src/math/mmx_guard.c

@@ -1,8 +0,0 @@
-/* $Id$ */
-#if defined(__WATCOMC__) || defined(__i386__) || defined(__amd64__)
-#define GUARD
-#include "mmx.c"
-#else
-void mmx_apply(MwLLMathVTable** t) {
-}
-#endif